Three of the world’s largest memory chip makers – Hynix, Micron and Samsung – has announced the final specifications for Hybrid Memory Cube or 3D DRAM. The new development is aimed at increasing performance of networking devices and high-end computing systems.
This new breed of DRAM has an aggregate bandwidth of 160 GB/s; that’s 15 times more throughput than standard DRAMs. For your reference, DDR3 RAMs sports 11 GB/s aggregate bandwidth and DDR4 RAMs has 18-20 GB/s aggregate bandwidth. Not only that; this Hybrid Memory Cube reduces power consumption by 70%.
The development efforts led by Micron, Hynix and Samsung were backed by the Hybrid Memory Cube Consortium (HMC). The technology stacks multiple memory dies on top of a DRAM controller, using a method called VIA (Vertical Interconnect Access) that passes an electronic wire through a silicon wafer.
Mike Black, chief technology strategist for Micron’s Hybrid Memory Cube team, explained the design concept saying, “We took the logic portion of the DRAM functionality out of it and dropped that into the logic chip that sits at the base of that 3D stack. That logic process allows us to take advantage of higher performance transistors … to not only interact up through the DRAM on top of it, but in a high-performance, efficient manner across a channel to a host processor. So that logic layer serves both as the host interface connection as well as the memory controller for the DRAM sitting on top of it”
The commercial versions of Hybrid Memory Cube are due in the second half of 2013. The first units will pack 2GB and 4GB chips.